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| 1 TC32M ECONOMONITORTM - 3-PIN SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR AND WATCHDOG FEATURES s Incorporates the Functionality of the Industry Standard TC1232 (Processor Monitor, Watchdog and Manual Override RESET Controller) into a Small, Lower Cost Package Guards Against Unstable Processor Operation Resulting from Power "Brown-Out" Automatically Halts and Restarts an Out-ofControl Microprocessor Output can be Wire-ORed, or Hooked to Manual RESET Push-button Switch Space-Saving 3-Pin TO-92 or SOT-223 Package 2 3 4 5 6 7 GENERAL DESCRIPTION The TC32M is a fully-integrated processor supervisor in a 3-pin package. It provides three important functions to safeguard processor sanity: precision power on/off RESET control, watchdog timer and external RESET override. On power-up, the TC32M holds the processor in the reset state for a minimum of 500msec after VDD is within tolerance to ensure a stable system start-up. Microprocessor sanity is monitored by the on-board watchdog circuit. The microprocessor must provide a high-to-low level shift (through an external resistor divider) on the RS pin of the TC32M. Should the processor fail to supply this signal within the specified timeout period (typically 700msec), an out-ofcontrol processor is indicated and the TC32M issues a processor reset as a result. The output of the TC32M can be wire-ORed with a pushbutton switch (or electronic signal) to override the TC32M and unconditionally reset the processor. When connected to a push-button switch, the TC32M provides contact debounce. The TC32M is packaged in a space-saving TO-92 or SOT-223 package. It provides all of the functionality of the industry standard TC1232 in a smaller, lower cost configuration. s s s s APPLICATIONS s s s s s s All Microprocessor-Based Systems Battery Powered Computers and Controllers Automotive Systems Intelligent Instruments Critical Processor Monitoring Embedded Controllers TO-92 1 23 PIN CONFIGURATIONS SOT-223 VDD 4 ORDERING INFORMATION Part No. TC32MCDB 3 RS TC32MCZB TC32MEZB 1 TC32MCDB TC32MEDB 2 VDD Package SOT-223 TO-92 SOT-223 TO-92 Temperature Range 0C to +70C 0C to +70C - 40C to +85C - 40C to +85C GND TC32MCZB TC32MEDB TC32MEZB GND VDD RS FUNCTIONAL BLOCK DIAGRAM VDD TYPICAL OPERATING CIRCUIT 5V VREF1 TC32M R1, 10k R2,10k MICROCONTROLLER WATCHDOG TIMER V DETECTOR PO.1 RS VREF2 DELAY TIMER GND RS TC32M RESET RESET MICROCONTROLLER EXAMPLE TC32M-2 9/26/96 8 5-3 TELCOM SEMICONDUCTOR, INC. ECONOMONITORTM - 3-PIN SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR AND WATCHDOG TC32M ABSOLUTE MAXIMUM RATINGS * Supply Voltage ........................................................ +6.0V Input Voltage, Any Pin ........ (GND - 0.3V) to (VDD + 0.3V) Operating Temperature Range TC32MC Package ................................. 0C to +70C TC32ME Package ............................ - 40C to +85C Storage Temperature Range ................ - 65C to +150C Lead Temperature (Soldering, 10 sec) ................. +300C * Static-sensitive device. Unused devices must be stored in conductive material. Protect devices from static discharge and static fields. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to Absolute Maximum Rating Conditions for extended periods may affect device reliability. RECOMMENDED OPERATING CONDITIONS, DC: TA = - 40C to +85C, unless otherwise specified. Symbol VDD VIH VIL Parameter Supply Voltage RS Input HIGH Level for PB RS Input LOW Level for PB Test Conditions Min 4.5 2.0 -- Typ -- -- -- Max 5.5 -- 0.3 Unit V V V ELECTRICAL CHARACTERISTICS, DC: VDD = 4.5V to 5.5V; TA = - 40C to 85C, unless otherwise specified. Symbol IIL IOL ICC VSTH VSTL VRST Parameter RS Input Leakage RS Output Current Operating Current RS Strobe HIGH Level RS Strobe LOW Level RESET Threshold Test Conditions VOL = 0.4V Note 1 Figure 1 Figure 1 VDD Falling (Note 2, Figure 3) Min -1 2.0 -- (VDD - 0.5) 2.00 4.25 Typ -- 10 50 -- -- -- Max +1 -- 200 -- (VDD - 1.5) 4.50 Unit A mA A V V V ELECTRICAL CHARACTERISTICS, CAPACITANCE: TA = 25C, unless otherwise specified. Symbol CIN COUT Parameter Input Capacitance Output Capacitance Test Conditions Min -- -- Typ -- -- Max 5 7 Unit pF pF ELECTRICAL CHARACTERISTICS, AC: TA = - 40C to +85C, VDD = 5V 10%, unless otherwise specified. Symbol tRST tST tTD tRPD Parameter RESET Active Time RS STROBE Pulse Width Watchdog Timeout Period VDD Detect to RS LOW Test Conditions Figure 2 Figure 1 Figure 1 Figure 3 Min 500 500 500 -- Typ 700 -- 700 -- Max 900 -- 900 100 Unit msec nsec msec nsec NOTES: 1. No output load. 2. All voltages referenced to ground. 5-4 TELCOM SEMICONDUCTOR, INC. ECONOMONITORTM - 3-PIN SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR AND WATCHDOG TC32M 1 tST RS VSTH (MIN) VSTL (MAX) VSTL (MIN) tTD VDD VRST 2 tRPD tRST VIH VIL RS Note: tTD is the maximum elapsed time between strobes which will keep the watchdog timer from forcing RS LOW. (A STROBE is defined as a high-to-low transition from VSTH to VSTL). 3 4 5 Figure 1. Watchdog Strobe Figure 3. Power Up / Down Reset Timing PB CLOSED PB OPEN RS VIH VIL tRST Figure 2. RS Pulled Low by Push-button Reset 6 7 PIN DESCRIPTION Pin No. 1 2 3 Symbol GND VDD RS Description Ground. The +5V power supply input. RESET/STROBE (Bidirectional). The open drain goes active if: 1. VDD falls below 4.5V nominal. 2. If pulled low by an external electronic signal or switch closure. 3. If the watchdog is not strobed within the minimum watchdog timeout period. 4. During power-up and power-down. In the input mode, RS connects to a voltage level shift network (typically a resistor divider to VDD.) The watchdog timer is reset when processor causes a voltage level VSTL to be applied to RS. The +5V power supply input. (SOT-223 only). 4 VDD 8 TELCOM SEMICONDUCTOR, INC. 5-5 ECONOMONITORTM - 3-PIN SYSTEM SUPERVISOR WITH POWER SUPPLY MONITOR AND WATCHDOG TC32M DETAILED DESCRIPTION The TC32M provides three important functions to safeguard stable processor operation: precision processor monitor, watchdog sanity timer and external override reset control. so the time between toggles is less than one watchdog timeout period. The strobe signal can be derived from microprocessor address, data and/or control signals. Typical circuit examples are shown in Figure 4. Resistor Value Selection The values of R1 and R2 must be chosen to ensure a valid low strobe level (VSTL) on RS when the processor I/O line is low. The use of 10k, 5% tolerance resistors are recommended. These values result in a nominal strobe level of 2.5 on RS (min/max of 2.13V / 3.08V, assuming VDD = 5.0V 10%). Other resistor values can be used, so long as the additive tolerances of the power supply and resistor values result in a strobe that falls within VSTH and VSTL under all additive tolerance conditions. Processor Monitor The RS pin is immediately driven low any time VDD is below the nominal threshold voltage. As a result, this pin is LOW when power is initially applied, holding the processor in its reset state. RS remains low for a minimum of 500msec after VDD is within tolerance to allow the power supply and processor to stabilize. Watchdog Timer The processor drives the RS pin with an input/output (I/O) line in series with an resistor voltage divider to VDD. Pulling the bottom resistor of this divider low results in an internal voltage change (strobe) sufficient to reset the watchdog timer, but above the VIL input threshold of the processor RESET pin. The processor must continuously apply strobes in this manner within a set period to verify proper software execution. A momentary reset (500msec minimum) is generated by the TC32M if a hardware or software failure keeps RS from being strobed within the watchdog timeout period. This action typically initiates the processor's power-up routine. If the interruption persists, new reset pulses are generated each timeout period until RS is strobed. This timeout period is typically 700msec. The software routine that drives the RS strobe must be in a section of the program that executes frequently enough External Override Reset Control A built-in debounce circuit allows a push-button switch (PB) or other electronic signal to be wire-ORed to this pin as an external RESET override control. The external RESET is required to be an active low signal. Internally, this input is timed to provide a minimum RESET pulse width of 500msec. Reference Figure 2. Supply Monitor Noise Sensitivity The TC32M is optimized for fast response to negativegoing changes in VDD. Systems with an inordinate amount of electrical noise on VDD (such as systems using relays), may require a 0.01F bypass capacitor to reduce detection sensitivity. This capacitor should be installed as close to the TC32M as possible to keep the capacitor lead length short. 5V 5V R1, 10k R2,10k MICROCONTROLLER R1, 10k R2, 10k DECODER MICROPROCESSOR PO.1 RS TC32M ADDRESS RS TC32M RESET RESET RESET RESET MICROCONTROLLER EXAMPLE MICROPROCESSOR EXAMPLE Figure 4. TC32M Hardware Connections (R1, R2 chosen to Meet VSTH, VSTL) 5-6 TELCOM SEMICONDUCTOR, INC. |
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